AMD Claims Venice Server CPU Beats Intel and Nvidia in Benchmark

AMD has published benchmark results claiming that its newest server processor substantially outperformed flagship CPUs from Intel and Nvidia. The figures, released on September 18, 2026, put a 256-core sixth-generation EPYC Venice chip 2.37 times ahead of Intel’s 96-core Xeon 6980P and 2.24 times ahead of Nvidia’s 88-core Vera processor.

The comparison used the SPEC CPU 2026 Integer Rate test. AMD supplied the results, and neither an independent laboratory nor SPEC.org has verified the claims. Even so, the disclosure is significant because it publicly treats Nvidia’s relatively new CPU operation as a direct competitor in the server market.

A three-way contest takes shape

Server processors were once dominated by a two-company contest between AMD and Intel. Nvidia’s move into general-purpose computing adds a third supplier to a market increasingly shaped by demand for complete artificial-intelligence systems rather than standalone CPUs.

AMD’s data compares two Venice configurations with Nvidia’s Vera chip. Its 256-core EPYC 9996 achieved the largest overall advantage, but a separate 96-core Venice model running at a higher clock speed was reportedly about 20% faster per core than Vera in the same test family. That result may matter more to some buyers than the headline throughput comparison, since the 256-core AMD processor has almost three times as many cores as Nvidia’s 88-core design.

Integer Rate tests are designed to measure aggregate performance across workloads that can run in parallel. A processor with a much larger core count therefore has a structural advantage in a heavily threaded comparison. AMD’s per-core result offers a narrower comparison between the designs, although it remains a vendor-supplied result rather than an independently reproduced finding.

Intel has not publicly answered AMD’s September 18 figures. The company’s Xeon 6980P uses Intel’s 18A manufacturing process and reaches as many as 288 cores in its highest-density version. Intel had previously claimed a 30% performance advantage over EPYC in a different workload, but that result cannot be directly matched against AMD’s latest figures because the tests and system configurations were different.

CPUs inside AI racks

The Venice processors form part of AMD’s broader Helios platform, introduced on July 23. Helios combines 72 Instinct MI455X accelerators with 18 Venice CPUs, Pensando networking technology and AMD’s ROCm software in a rack-scale system.

AMD says the MI455X includes 432GB of HBM4 memory and bandwidth of about 23.3 terabytes per second. The company also claims that a full 72-accelerator rack can deliver 20.1 petaflops of dense FP8 performance. Helios shipments are due to begin near the end of the third quarter of 2026, while OpenAI is expected to put systems into operation during the fourth quarter.

AMD has said Oracle received 50,000 GPUs from the MI450 family earlier this year, demonstrating that the company has already secured large-scale demand for the hardware family. However, independent MLPerf-style results for the MI455X were not available as of the report, leaving those performance claims unconfirmed outside AMD’s own material.

Nvidia’s Vera CPU is designed to work alongside the company’s Rubin GPUs. Nvidia began shipping its combined Vera Rubin NVL72 system in August and said in September that the platform had entered full production. Each liquid-cooled rack contains 72 Rubin GPUs, with each accelerator carrying 288GB of HBM4, alongside Vera processors.

At an infrastructure event on September 15, Nvidia said the Vera Rubin NVL72 could provide as much as 30 times the throughput per megawatt of its earlier GB300 NVL72 system. That measurement applies to the entire rack, including GPUs, CPUs and networking, rather than to Vera alone. AMD’s CPU-only comparison therefore targets a narrower part of Nvidia’s platform claim.

Software and independent testing remain decisive

The benchmark dispute comes as AMD tries to strengthen the software side of its AI offering. The company released ROCm 10 on August 27 and said it delivered up to 3.3 times the inference throughput and 2.4 times the training throughput of ROCm 7 on the same hardware.

Those improvements could be more important to customers than a CPU result if independent testing confirms them. AI systems are generally influenced heavily by software efficiency, memory capacity and bandwidth, as well as by processor throughput. Nvidia retains a major software advantage through CUDA, which has had many years to build developer adoption.

For buyers planning data-center deployments in 2027, the central difficulty is that the major performance figures remain supplier-generated. AMD’s Venice comparison, Nvidia’s rack-level throughput claims and the companies’ accelerator specifications have not yet been brought together in a neutral testing programme. Memory supply is another constraint: pressure from the HBM shortage has already raised chip prices sharply in China.

The result is a market in which AMD is challenging Intel’s established position while also testing whether Nvidia can turn its strength in GPUs into a credible CPU business. The final judgment will depend less on launch-week charts than on independently measured performance, software support and the cost of operating complete racks at scale.